JEE Main · 2024 · 31 Jan 2024 · Shift 2 · Semiconductors

The output of the given circuit diagram is

1. (A)A | B | Y
   0 | 0 | 0
   1 | 0 | 0
   0 | 1 | 0
   1 | 1 | 1
2. (B)A | B | Y
   0 | 0 | 0
   1 | 0 | 1
   0 | 1 | 1
   1 | 1 | 0
3. (C)A | B | Y
   0 | 0 | 0
   1 | 0 | 0
   0 | 1 | 0
   1 | 1 | 0✓ Correct
4. (D)A | B | Y
   0 | 0 | 0
   1 | 0 | 0
   0 | 1 | 1
   1 | 1 | 0

Answer: (C)

Solution

Label the two intermediate outputs from the figure. The upper branch computes $P=A+\overline{B}$, and the lower branch computes $Q=\overline{A}+B$; the final gate is a NOR of these two, giving $Y=\overline{P+Q}$.

Checking all four input combinations:

$A=0,B=0$: $P=0+1=1$, $Q=1+0=1$, $Y=\overline{1}=0$

$A=1,B=0$: $P=1+1=1$, $Q=0+0=0$, $Y=\overline{1}=0$

$A=0,B=1$: $P=0+0=0$, $Q=1+1=1$, $Y=\overline{1}=0$

$A=1,B=1$: $P=1+0=1$, $Q=0+1=1$, $Y=\overline{1}=0$

The output Y is 0 for every input combination.

JEE Main · 2024 · 31 Jan 2024 · Shift 2 · Single correct option