JEE Main · 2023 · 11 Apr 2023 · Shift 2 · Semiconductors

The upper gate combines the inputs as $A+B$, and the lower gate combines them as $A\cdot B$. These two outputs feed a NAND gate, producing $\overline{(A+B)\cdot (A\cdot B)}$, and the final inverter removes that bar to leave $Y=(A+B)\cdot (A\cdot B)$. Because $A\cdot B$ is true only when both inputs are high, the factor $A+B$ is automatically true there, so the product collapses to $Y=A\cdot B$. The circuit behaves as an AND gate.